Design Methodology for highly Reliable Digital ASIC Designs

In spite of the huge research efforts and respectable scientific achievements, there are still challenges regarding the use of commercial ASIC technologies in space and safety-critical applications. The most important challenges are: 1. Radiation-hardened technologies are expensive (qualification and quality requirements are severe) and commercially not attractive (small volume production). 2. There is no standard integrated framework of circuit design techniques that provides simultaneous SEU, SET, and SEL fault-tolerance. 3. There is no standard design automation flow for fault-tolerant digital ASICs and SOCs. This book presents a design methodology for fault-tolerant ASIC that is based on redundant circuits with latchup protection and additional implementation steps during logic synthesis and layout generation. The proposed design approach provides the ASICs immune to the upsets, transients, and latchup faults by combining and integrating different fault-tolerant techniques in a carefully designed procedure.

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Характеристики товара

ISBN9783659534157
Автор на обложкеVladimir Petrovic
Вес501
Высота упаковки1
Глубина упаковки1
Год выпуска2014
ИздательствоLAP Lambert Academic Publishing
Количество страниц252
Ширина упаковки1
Язык изданияАнглийский

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